Details: Hitachi's SH-4
Hitachi 200 MHz SH-4 Details
Design Hitachi
Family SH series
Manufacturer Hitachi
Clock Rate 200 MHz
MIPS Rating 360 MIPS
Floating Point Rating 1400 MFLOPS* (900 MFLOPS sustained with external memory)
Pipeline 5 stages
Superscaler yes
Instruction Cache 8 KByte
Data Cache 16 KByte
Data Bus 64-bit
Bus Frequency 100 MHz
Bus Bandwidth 800 MB/sec
Power Dissipation 1.5 Watts Typical (@200MHz)
IC Process 0.25 µm, four-layer metal
Transistors 3.2 million
Die Size 42.25 mm² die size (6.5 mm x 6.5 mm)
Package 256-pin ball grid array (BGA)
Availability (samples) January, 1998
Availability (production quantities) 3rd Quarter 1998
Price(10K)² 4,000 yen (US$31.70)*
The SH-4 is a multiple bit CPU. Here is a list of the different functions, there bit sizes and the benefits of that particular bit size.
Function Bits Benefit
Instructions 16-bits 40 percent smaller size than comparable 32-bit RISC
CPU Precision 32-bits More accurate results compared to 16-bit values
Memory Addressing 32-bits 4 GB memory access which is overkill for a console that will not have more then 32 MB of memory
External Data Bus 64-bits 800 MB/sec transfer rate with 100 MHz SDRAM
Floating Point Precision 64-bits More accuracy in mantissa portion of number which aids graphic operations
Floating Point Bus 128-bits 3.2 GB/sec transfer rate from the data cache for matrix data aligned together as four separate 32-bit values like this: [32-bit][32-bit][32-bit][32-bit]
http://www.segatech.com/technical/cpu/index.htmlAhora faltan los datos del mips de psp, que sony parece esconderlos bien